Dynamic Engineers is pleased to announce the availability of very LOW phase jitter XO and VCXO SDF oscillator devices. SDF stands for software defined frequency. Customers can now order any custom frequency clock or voltage-controlled oscillator within the design operating range of an LVDS family or LVCMOS product platform in 5 x 7 mm 6-pad ceramic surface mount package.
Ordering options in the datasheets ( Page 5 ) of X, Y, Z include choices of supply voltage ( 2.5V or 3.3V ), synthesizer topology ( Fractional N or Integer N ), and clock versus VCXO requirement.
The part number structure is the following:
1. XO3506-PF-LVCMOS-xxx.xxxxxxMHz-X-Y-Z
2. XO3506-PF-LVDS-xxxx.xxxxxxMHz-X-Y-Z
Fractional N samples can be delivered in 1 to 5 days. Integer N can be delivered in 1 to 4 weeks.
Fractional N has higher integrated phase jitter than Integer N synthesizer topology.
Higher integrated phase jitter translates into higher BER ( bit error rates ) in data communications.
Standard overall stability is +/- 50 ppm from -40C to 85C which will cover around 80% of the requirements.
Tighter stability is available but will increase lead-time due to special angle crystal blank delivery.
Over the next three quarters smaller packages and TCXO versions will be released as a function of overall market interest.
With QA testing and light assembly operations in both Asia and the US, DEI can offer customers a more comprehensive performance test profile and deeper understanding of standard products where applications demand it. We have over twenty years of production engineering knowledge of XO and VCXO behavior as well as best in class processing techniques to achieve high levels of long term reliability in the customer specific applications.
For other custom requirements please consult with DEI Sales and Application Engineering.